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FROMLIST: Enable runtime PM support - #1328
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sdhci-msm currently exposes MMC crypto profile and sets MMC_CAP2_CRYPTO before enabling ICE. This leaves a window where blk-crypto can issue keyslot programming calls before sdhci-msm has explicitly enabled ICE. This works today because ICE clocks remain enabled after ICE probe, but the storage consumer should not rely on that implicit clock state. Once ICE supports runtime PM and clocks are suspended after probe, accessing ICE registers before qcom_ice_enable() call can fail due to unclocked register access. Enable ICE during the sdhci-msm crypto early init path which ensures ICE is ready before blk-crypto can issue key programming calls. Remove ICE enable call from CQE path, since ICE is now enabled during SDHCI crypto initialization only. Link: https://lore.kernel.org/linux-arm-msm/20261022-qcom_ice_pm_enable-v1-1-f7a84086c651@oss.qualcomm.com/ Fixes: c7eed31 ("mmc: sdhci-msm: Switch to the new ICE API") Signed-off-by: Kuldeep Singh <kuldeep.singh@oss.qualcomm.com> Signed-off-by: Roopak Houji <rhouji@qti.qualcomm.com>
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Merge Check Failed: CR Not Eligible for Merge CR 4675023 is not eligible for merge. The parent software image for kernel.qli.2.0 is not development complete. Entity: Please ensure the CR passes both CCT (ComponentChangeTasks) and ICT (Integration Change Tasks) validations. |
PR #1328 — validate-patchPR: #1328
Final Summary
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PR #1328 — checker-log-analyzerPR: #1328
Detailed report: Full report
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…support ufs-qcom currently exposes UFS crypto profile and sets UFSHCD_CAP_CRYPTO before enabling ICE. This leaves a window where blk-crypto can issue keyslot programming calls before ufs-qcom has explicitly enabled ICE. Similar to MMC, UFS also works today as ICE clocks remain enabled after the probe, but it should not rely on that implicit clock state. Once ICE supports runtime PM, ICE clocks can be suspended after probe, and accessing ICE registers before qcom_ice_enable() call can fail due to unclocked register access in qcom_ice_program_key(). Enable ICE during ufs crypto init path to ensure ICE is ready before blk-crypto can issue key programming calls. Also call qcom_ice_enable() from HCE PRE_CHANGE path once crypto support has been enabled. UFS controller reset can reset ICE state, and the UFS core can reprogram keys during HCE start before POST_CHANGE. Re-enabling ICE in PRE_CHANGE makes ICE ready before reset-time key reprogramming and for any later ICE operation. Link: https://lore.kernel.org/linux-arm-msm/20261022-qcom_ice_pm_enable-v1-2-f7a84086c651@oss.qualcomm.com/ Fixes: 56541c7 ("scsi: ufs: ufs-qcom: Switch to the new ICE API") Signed-off-by: Kuldeep Singh <kuldeep.singh@oss.qualcomm.com> Signed-off-by: Roopak Houji <rhouji@qti.qualcomm.com>
Ice driver currently enables its clocks during probe and keeps them prepared/enabled even after probe is complete. On targets where ICE exists as separate DT node and storage consumers reference it through "qcom,ice", leaves ICE clock voted while the system is idle. To mitigate this, add runtime PM callbacks to gate the core and iface clocks. During probe, enable the clocks to read the ICE version/fuse state, and then disable clocks and mark runtime PM state as suspended. For legacy binding, keep clock ownership with the storage consumer dev as it created the ICE instance. Link: https://lore.kernel.org/linux-arm-msm/20261022-qcom_ice_pm_enable-v1-3-f7a84086c651@oss.qualcomm.com/ Signed-off-by: Kuldeep Singh <kuldeep.singh@oss.qualcomm.com> Signed-off-by: Roopak Houji <rhouji@qti.qualcomm.com>
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Merge Check Failed: CR Not Eligible for Merge CR 4675023 is not eligible for merge. The parent software image for kernel.qli.2.0 is not development complete. Entity: Please ensure the CR passes both CCT (ComponentChangeTasks) and ICT (Integration Change Tasks) validations. |
PR #1328 — validate-patchPR: #1328
Final Summary
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PR #1328 — checker-log-analyzerPR: #1328
Detailed report: Full report
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This series fixes ICE clock lifetime handling when ICE is modeled as a
standalone device and referenced by storage controllers through
qcom,ice.
Currently, ICE driver enables clocks during probe and keeps them
prepared after probe completes. This keeps the ICE clock voted even when
the storage controller is idle. Add runtime PM support to the ICE driver
so the standalone ICE device can enable clocks for probe-time register
access, then disable them and remain suspended while idle.
While enabling runtime PM in ice exposed couple of sequence bugs in
storage drivers(ufs and sdhci-msm) as any key programming call used to
go ice and never complaint as ice-clocks were always on.
Example, unclocked register access happened from ufs/mmc in
qcom_ice_program_key().
qcom_ice_writel(ice, 0x0, QCOM_ICE_REG_CRYPTOCFG(slot));
Fixing this issue require ice instance at early ufs/emmc probe so that
correct sequence is established and ice is ready to accept key program
calls from blk-crypto or any explicit storage operation.
Merge strategy:
Patch 1/3 and 2/3 are storage driver fixes and should be available
before patch 3/3 lands otherwise will result in bootup crash.
Validation:
Tested on shikra-evk, kodiak rb3-gen2 and sm8750-mtp.
CRs-fixed: 4675023
Link: https://lore.kernel.org/linux-arm-msm/20261022-qcom_ice_pm_enable-v1-0-f7a84086c651@oss.qualcomm.com/
Signed-off-by: Kuldeep Singh kuldeep.singh@oss.qualcomm.com
Signed-off-by: Roopak Houji rhouji@qti.qualcomm.com