ras: add ARM RAS extensions and Device Tree frontend by faruque-ansari · Pull Request #1324 · qualcomm-linux/kernel

Faruque Ansari (faruque-ansari) · 2026-10-22T05:38:54Z

This branch backs out the previously-merged AEST RAS work (PRs #603, #672, #711),
which lived under drivers/ras/aest/, and re-lands it as the upstream.

The goal is to replace the current AEST implementation with the exact
latest patches posted to lore, so we stay aligned with upstream and carry no out-of-tree
delta.

What changed

Revert prior AEST work (3 commits)

Revert "Move CPU PM notifier registration to Probe (WORKAROUND: Move CPU PM notifier registration to Probe #711)"
Revert "ras: aest: Restore misc0 register on CPU idle exit (WORKAROUND: ras: aest: Restore misc0 register on CPU idle exit #672)"
Revert "ras: aest: extend AEST support to Device Tree frontend (ras: aest: extend AEST support to Device Tree frontend #603)"

Apply upstream AEST / Armv8 RAS Extensions series — 16 patches
From Ruidong Tian, v7:
https://lore.kernel.org/all/20260602071540.3711528-1-tianruidong@linux.alibaba.com/

Introduces the ACPI AEST frontend, the arm64_ras backend platform driver,
system/MMIO register abstraction, interrupt plumbing, error reporting,
memory_failure handling for UEs, CE thresholding, decode notifier chain,
debugfs ABI, inject interface, CMN-700 vendor support, error-storm mitigation,
and a trace event.

Apply Qualcomm DT frontend series — 5 patches**
From Umang Chheda:
https://lore.kernel.org/all/20260918095746.3347893-1-umang.chheda@oss.qualcomm.com/

Adds the DT bindings, the Device Tree frontend (producing the same fwnode
properties as the ACPI path), and RAS error-source nodes for monaco, lemans,
and shikra.

CRs-Fixed: 4551759

This reverts commit 360986b, reversing changes made to 9740e45. PR qualcomm-linux#711 (WORKAROUND) moved aest_cpu_pm_init() from module_init to probe so the CPU PM notifier is not registered on targets where AEST is not enabled. Reverted as part of backing out the AEST DT frontend series (qualcomm-linux#603) and its follow-up fixes; this change only touches drivers/ras/aest/aest-core.c, which is removed by the qualcomm-linux#603 revert. Co-Authored-By: Claude Opus 4.8 (1M context) <noreply@anthropic.com>

…linux#672)" This reverts commit 3e60f57, reversing changes made to d58ad5c. PR qualcomm-linux#672 (WORKAROUND) added a CPU PM notifier to restore the AEST misc0/ctrl registers on CPU idle exit, which reset on idle entry and blocked CE/UE interrupts. Reverted as part of backing out the AEST DT frontend series (qualcomm-linux#603); this change only touches drivers/ras/aest/aest-core.c, which is removed by the qualcomm-linux#603 revert. Co-Authored-By: Claude Opus 4.8 (1M context) <noreply@anthropic.com>

…omm-linux#603)" This reverts commit cf15a4e, reversing changes made to 3862dc4. PR qualcomm-linux#603 extended the ARM AEST (Arm Error Source Table) RAS driver with a Device Tree frontend mirroring the ACPI implementation, along with core driver correctness fixes, DT bindings, and Lemans/Monaco SoC error nodes. Reverting the full merge removes: - drivers/ras/aest/ (core, DT/ACPI frontends, CMN, inject, sysfs) - drivers/acpi/arm64/aest.c and ACPI AEST glue - DT bindings (Documentation/devicetree/bindings/arm/arm,aest.yaml, include/dt-bindings/arm/aest.h) and ABI docs - lemans.dtsi / monaco.dtsi AEST nodes - arm-cmn RAS additions and qcom.config CPU caches RAS enablement The follow-up workarounds in qualcomm-linux#672 and qualcomm-linux#711 are reverted first so this merge revert applies cleanly. Co-Authored-By: Claude Opus 4.8 (1M context) <noreply@anthropic.com>

Parse the ARM Error Source Table (AEST) v2 [1] and present each error-source node to the RAS subsystem as a generic platform device. Rather than letting the RAS driver consume AEST-specific structures directly, all per-node metadata (interface type, register bases, group format, record bitmaps, GSIVs, vendor data) is conveyed via fwnode software-node properties. This keeps every AEST encoding detail in the ACPI front-end and lets the same back-end driver bind unchanged when a Device Tree front-end is added later. If the interface flags indicate an associated ACPI namespace device (AEST_XFACE_FLAG_ERROR_DEVICE), the companion ACPI device is looked up and attached so that downstream drivers can reach it. [1]: https://developer.arm.com/documentation/den0085/0200/ Link: https://lore.kernel.org/all/20260602071540.3711528-1-tianruidong@linux.alibaba.com/ Signed-off-by: Ruidong Tian <tianruidong@linux.alibaba.com>

Introduce the back-end platform driver that binds to the devices created by the AEST front-end. Driver input is taken exclusively from fwnode properties, so the same probe path serves any future front-end (DT, hand-rolled) without conditional code. The probe builds two layers of state: - struct ras_node: one AEST error source - struct ras_record: one error record inside a node This split mirrors the hardware: a node owns the shared MMIO/ERRGSR window and policy, while records are the unit at which errors are reported, masked and polled. Later patches plug interrupts, decoding, storm mitigation and userspace ABI onto these two objects without touching the front-end. Link: https://lore.kernel.org/all/20260602071540.3711528-1-tianruidong@linux.alibaba.com/ Signed-off-by: Umang Chheda <umang.chheda@oss.qualcomm.com> Signed-off-by: Ruidong Tian <tianruidong@linux.alibaba.com>

…MIO registers ARM RAS error records are reachable either through system registers (PE-affine sources) or through memory-mapped windows (off-core sources), depending on the AEST interface type. Hard-coding the choice at every call site would scatter that knowledge across the driver and double every future change. Introduce a ras_access ops table that hides the transport behind a single read/write contract, so all later error handling, masking and injection code is access-method-agnostic and can be reasoned about as plain register operations. Link: https://lore.kernel.org/all/20260602071540.3711528-1-tianruidong@linux.alibaba.com/ Signed-off-by: Ruidong Tian <tianruidong@linux.alibaba.com>

Add inject register descripted in Common Fault Injection Model Extension. Link: https://lore.kernel.org/all/20260602071540.3711528-1-tianruidong@linux.alibaba.com/ Signed-off-by: Ruidong Tian <tianruidong@linux.alibaba.com>

AEST describes one or more interrupts per error source for delivering Fault Handling (FHI) and Error Recovery (ERI) events. This change keeps the existing front-end / back-end split: - The ACPI front-end is the only place that understands AEST interrupt encodings; it registers each GSI and exposes the resulting Linux IRQs as named platform resources ("AEST:FHI" / "AEST:ERI"). - The back-end looks up its IRQs by name and requests them according to routing type. SPIs are device-shared and use a normal shared handler. PPIs are inherently per-CPU, so the node is cloned into a percpu ras_node and the handler is installed via request_percpu_irq() with that percpu cookie, ensuring each CPU services its own copy of the source. Link: https://lore.kernel.org/all/20260602071540.3711528-1-tianruidong@linux.alibaba.com/ Signed-off-by: Ruidong Tian <tianruidong@linux.alibaba.com>

Until now, AEST nodes were registered but never had interrupt routing programmed, so probe finished without actually arming any error source. Both shared and PE (oncore) nodes need this bring-up; the difference is only that oncore state is percpu and must follow CPU online/offline. Link: https://lore.kernel.org/all/20260602071540.3711528-1-tianruidong@linux.alibaba.com/ Signed-off-by: Ruidong Tian <tianruidong@linux.alibaba.com>

Wire the IRQs registered by the front-end into a record-processing routine, so that interrupts raised by an error source actually translate into observable error events. Link: https://lore.kernel.org/all/20260602071540.3711528-1-tianruidong@linux.alibaba.com/ Signed-off-by: Umang Chheda <umang.chheda@oss.qualcomm.com> Signed-off-by: Ruidong Tian <tianruidong@linux.alibaba.com>

When an uncorrectable error (UE/DE) is detected and the error record reports a System Physical Address (SPA), invoke memory_failure() to offline the affected page. This prevents further consumption of corrupted data. Link: https://lore.kernel.org/all/20260602071540.3711528-1-tianruidong@linux.alibaba.com/ Signed-off-by: Ruidong Tian <tianruidong@linux.alibaba.com>

The RAS version of a component can be probed via its ERRDEVARCH register. In cases where a component (e.g., SMMU) does not implement an ERRDEVARCH register, the driver falls back to using the RAS version of the Processing Element (PE). Link: https://lore.kernel.org/all/20260602071540.3711528-1-tianruidong@linux.alibaba.com/ Signed-off-by: Ruidong Tian <tianruidong@linux.alibaba.com>

The CE threshold defines the number of Correctable Errors (CE) that must occur in a record before triggering an interrupt. Error records support multiple threshold configurations, including 8B, 16B, and 32B. This patch detects the supported threshold settings for error records and sets the default threshold to 1, ensuring an interrupt is generated for every CE occurrence. Link: https://lore.kernel.org/all/20260602071540.3711528-1-tianruidong@linux.alibaba.com/ Signed-off-by: Ruidong Tian <tianruidong@linux.alibaba.com>

Introduce a blocking notifier chain that allows external modules (e.g., EDAC drivers, vendor-specific decoders) to receive and further decode RAS error events. Each error event is passed to all registered decoders after being logged. Link: https://lore.kernel.org/all/20260602071540.3711528-1-tianruidong@linux.alibaba.com/ Signed-off-by: Ruidong Tian <tianruidong@linux.alibaba.com>

Expose per-node and per-record configuration through debugfs so bring-up and validation can inspect and tweak driver state (CE threshold, error counters, ...) at runtime. Link: https://lore.kernel.org/all/20260602071540.3711528-1-tianruidong@linux.alibaba.com/ Signed-off-by: Umang Chheda <umang.chheda@oss.qualcomm.com> Signed-off-by: Ruidong Tian <tianruidong@linux.alibaba.com>

End-to-end validation of the RAS driver requires the ability to generate errors on demand. Driver gives two complementary paths, which the inject interface deliberately keeps separate: - Soft injection writes directly into the record's status registers and is unconstrained by the spec. It is the tool of choice for state-machine coverage: notifier delivery, ABI shape. - Hard injection drives the architected inject registers and obeys the hardware contract, exercising the real interrupt and decode paths. Link: https://lore.kernel.org/all/20260602071540.3711528-1-tianruidong@linux.alibaba.com/ Signed-off-by: Ruidong Tian <tianruidong@linux.alibaba.com>

The CMN (Coherent Mesh Network) architecture incorporates five distinct device types. Each device type is associated with an error group register set. CMN's error records utilize a memory-mapped single error record view [1]. Critically, one error record corresponds to one AEST node, implying that a single CMN instance can generate hundreds of AEST nodes. To manage this scale, this driver introduces a virtual ras node, which represents an entire CMN device, such as an HNI or HNF. This allows an HNF ras node, for instance, to leverage its errgsr register to pinpoint which specific error record has reported an error. [1]: https://developer.arm.com/documentation/102308/latest/ Link: https://lore.kernel.org/all/20260602071540.3711528-1-tianruidong@linux.alibaba.com/ Signed-off-by: Ruidong Tian <tianruidong@linux.alibaba.com>

Corrected errors can occasionally be reported at a very high rate (known on x86 as a "CMCI storm"), consuming a substantial share of CPU time and disturbing the running workload. The RAS driver needs to throttle this so that error reporting itself does not become a denial of service. Adopt a hybrid per-record / per-node strategy: - Each record tracks its own CE history in a sliding window. By default a record enters storm mode once it accumulates more than 5 corrected errors within roughly one minute, at which point its FHI/CFI is masked via ERR<n>_CTLR and the record is added to a node-wide poll set. It leaves storm mode after ~30 s without any further error, at which point the interrupt is unmasked again. The thresholds and the poll interval are exposed via debugfs so operators can retune the algorithm at runtime without rebuilding the kernel. - The node owns a single timer that drains every stormy record. The first record entering storm starts the timer; the last one leaving stops it. - The poll interval is adaptive: halved on each tick that still finds errors, doubled on each tick that does not, capped at 300 s. This way the driver tracks the actual storm intensity instead of paying a fixed polling cost. - - ERI / UI (uncorrectable reporting) is intentionally excluded: uncorrected errors must remain synchronous and never be rate-limited. The result bounds CPU spent on RAS under fault floods while preserving full fidelity for correctness-critical paths. Link: https://lore.kernel.org/all/20260602071540.3711528-1-tianruidong@linux.alibaba.com/ Signed-off-by: Ruidong Tian <tianruidong@linux.alibaba.com>

Add a trace event for hardware errors reported by the ARMv8 RAS extension registers. userspace app can monitor this trace event and decode error information. Link: https://lore.kernel.org/all/20260602071540.3711528-1-tianruidong@linux.alibaba.com/ Signed-off-by: Ruidong Tian <tianruidong@linux.alibaba.com>

ARMv8 and later processors implement the RAS (Reliability, Availability and Serviceability) extensions, exposing hardware error records through a standardised register interface. Add Device Tree bindings to describe RAS error sources. Link: https://lore.kernel.org/all/20260918095746.3347893-1-umang.chheda@oss.qualcomm.com/ Signed-off-by: Umang Chheda <umang.chheda@oss.qualcomm.com>

Add a Device Tree frontend for the ARM64 RAS driver, allowing it to be used on platforms without ACPI firmware. The error sources defined in DT are registered as arm64_ras platform devices at boot. The frontend produces the same software fwnode properties as the ACPI path, so the core driver probes DT and ACPI nodes identically without any firmware-specific knowledge. Link: https://lore.kernel.org/all/20260918095746.3347893-1-umang.chheda@oss.qualcomm.com/ Signed-off-by: Umang Chheda <umang.chheda@oss.qualcomm.com>

ARM Reliability, Availability and Serviceability (RAS) enables processor components(for eg cache, tlb etc) to record and signal hardware faults through architected error records and fault handling interrupts. This allows software to detect, report and, where possible, recover from hardware errors. The Monaco CPU subsystem implements RAS error records for the L1/L2 cache hierarchy and the shared L3 caches. Describe these error sources in Device Tree so that the ARM RAS framework can discover them and handle cache-related error reports. Co-developed-by: Faruque Ansari <faruque.ansari@oss.qualcomm.com> Link: https://lore.kernel.org/all/20260918095746.3347893-1-umang.chheda@oss.qualcomm.com/ Signed-off-by: Umang Chheda <umang.chheda@oss.qualcomm.com> Signed-off-by: Faruque Ansari <faruque.ansari@oss.qualcomm.com>

ARM Reliability, Availability and Serviceability (RAS) enables processor components(for eg cache, tlb etc) to record and signal hardware faults through architected error records and fault handling interrupts. This allows software to detect, report and, where possible, recover from hardware errors. The Lemans CPU subsystem implements RAS error records for the L1/L2 cache hierarchy and the shared L3 caches. Describe these error sources in Device Tree so that the ARM RAS framework can discover them and handle cache-related error reports. Co-developed-by: Faruque Ansari <faruque.ansari@oss.qualcomm.com> Link: https://lore.kernel.org/all/20260918095746.3347893-1-umang.chheda@oss.qualcomm.com/ Signed-off-by: Umang Chheda <umang.chheda@oss.qualcomm.com> Signed-off-by: Faruque Ansari <faruque.ansari@oss.qualcomm.com>

ARM Reliability, Availability and Serviceability (RAS) enables processor components (for eg cache, tlb etc) to record and signal hardware faults through architected error records and fault handling interrupts. This allows software to detect, report and, where possible, recover from hardware errors. The Shikra CPU subsystem implements RAS error records for the L1/L2 cache hierarchy and the shared L3 caches. Describe these error sources in Device Tree so that the ARM RAS framework can discover them and handle cache-related error reports. Co-developed-by: Faruque Ansari <faruque.ansari@oss.qualcomm.com> Link: https://lore.kernel.org/all/20260918095746.3347893-1-umang.chheda@oss.qualcomm.com/ Signed-off-by: Umang Chheda <umang.chheda@oss.qualcomm.com> Signed-off-by: Faruque Ansari <faruque.ansari@oss.qualcomm.com>

qswat-orbit-external · 2026-10-22T05:39:16Z

Merge Check Failed: No CR Numbers Found

Error: No Change Request numbers were found.

Please add Change Request numbers to your pull request description in the format CRs-Fixed: 12345 or link GitHub issues that are associated with Change Requests.

qswat-orbit-external · 2026-10-22T05:40:28Z

Merge Check Failed: No CR Numbers Found

Error: No Change Request numbers were found.

Please add Change Request numbers to your pull request description in the format CRs-Fixed: 12345 or link GitHub issues that are associated with Change Requests.

qswat-orbit-external · 2026-10-22T05:41:27Z

Merge Check Failed: No CR Numbers Found

Error: No Change Request numbers were found.

Please add Change Request numbers to your pull request description in the format CRs-Fixed: 12345 or link GitHub issues that are associated with Change Requests.

qswat-orbit-external · 2026-10-22T05:42:28Z

Merge Check Failed: No CR Numbers Found

Error: No Change Request numbers were found.

Please add Change Request numbers to your pull request description in the format CRs-Fixed: 12345 or link GitHub issues that are associated with Change Requests.

qswat-orbit-external · 2026-10-22T05:44:02Z

Dev Completion validation failed

CR: 4551759
Change Task: kernel.qli.2.0
Error: GenAI Assisted field must be set before moving change tasks to Development Complete. Please provide GenAI information.

The change task for this CR could not be moved to Dev Complete because of the error above. Please resolve the issue in Orbit and re-run the failed Orbit check.

qlijarvis · 2026-10-22T07:06:11Z

PR #1324 — validate-patch

PR: #1324

Verdict	Issues	Detailed Report
⚠️	9	Full report

Final Summary

Lore link present: Yes - two lore series linked:
- Commits 4-19: https://lore.kernel.org/all/20260602071540.3711528-1-tianruidong@linux.alibaba.com/ (Ruidong Tian, v7, posted June 2, 2026)
- Commits 20-24: https://lore.kernel.org/all/20260918095746.3347893-1-umang.chheda@oss.qualcomm.com/ (Umang Chheda, v3, posted September 18, 2026)
- Commits 1-3: Revert commits - no lore link expected
Lore link matches PR commits: Yes - commit messages, authorship, and technical content are faithful to lore sources. FROMLIST prefix correctly indicates patches posted to mailing list but not yet merged.
Upstream patch status: ⏳ Decision Pending - Both patch series were posted to linux-edac@vger.kernel.org in 2026 (June 2 and September 18). No merge signals (applied/queued/Reviewed-by/Acked-by) or rejection signals (NAK) found in the fetched lore threads. The patches are under active community review. Last activity: September 18, 2026 (v3 of DT frontend series).
PR present in qcom-next/topics: Fail - 2/24 commit(s) are missing from both qcom-next and topics
- Commit 1/24: Revert "Move CPU PM notifier registration to Probe (WORKAROUND: Move CPU PM notifier registration to Probe #711)" - missing
- Commit 2/24: Revert "ras: aest: Restore misc0 register on CPU idle (WORKAROUND: ras: aest: Restore misc0 register on CPU idle exit #672)" - missing
The two missing commits are vendor-specific reverts that back out previous WORKAROUND changes. Their absence from qcom-next/topics may indicate they are new cleanup work specific to this PR.

Verdict: ⚠️ — click to expand

🔍 Patch Validation

PR: #1324 - ARM RAS Extensions support (24 commits)
Upstream commits:

https://lore.kernel.org/all/20260602071540.3711528-1-tianruidong@linux.alibaba.com/ (commits 4-19)

https://lore.kernel.org/all/20260918095746.3347893-1-umang.chheda@oss.qualcomm.com/ (commits 20-24)
Verdict: ⚠️ PARTIAL

Commit Message

Check Status Note

Subject matches upstream ✅ FROMLIST commits preserve upstream subjects; Revert commits have no upstream

Body preserves rationale ✅ Technical descriptions match lore patches

Fixes tag present/correct N/A No Fixes tags in upstream patches

Authorship preserved ⚠️ ISSUE: Commits 5-19 have authorship mismatch (see Issues below)

Backport note (if applicable) N/A FROMLIST prefix used correctly

Diff

File Status Notes

Commits 1-3 (Reverts) ✅ Revert commits - no lore comparison applicable

Commit 4 (ACPI/AEST) ✅ Author matches lore (Ruidong Tian)

Commits 5-19 (arm64 RAS core) ⚠️ Author mismatch: PR shows Ruidong Tian as author, but lore author is also Ruidong Tian with Umang Chheda co-developer

Commits 20-24 (DT bindings/support) ✅ Author matches lore (Umang Chheda)

Issues

Critical authorship issue (commits 5-19):

The lore patch series from Ruidong Tian (https://lore.kernel.org/all/20260602071540.3711528-1-tianruidong@linux.alibaba.com/) shows:

From: Ruidong Tian tianruidong@linux.alibaba.com

Signed-off-by: Umang Chheda umang.chheda@oss.qualcomm.com

Signed-off-by: Ruidong Tian tianruidong@linux.alibaba.com

The PR commits (e.g., commit 5/24 "FROMLIST: arm64: ras: Add probe/remove for arm64_ras driver") show:

From: Ruidong Tian tianruidong@linux.alibaba.com

Signed-off-by: Umang Chheda umang.chheda@oss.qualcomm.com

Signed-off-by: Ruidong Tian tianruidong@linux.alibaba.com

Analysis: The authorship is actually correct for FROMLIST commits. The lore author (Ruidong Tian) is preserved in the From: field, and Umang Chheda's Signed-off-by: is present, indicating co-development. This follows the FROMLIST authorship rule where the original author must appear in Signed-off-by: even if the submitter differs. ✅

Revert commits (1-3):

These are vendor-specific reverts of internal PRs (WORKAROUND: Move CPU PM notifier registration to Probe #711, WORKAROUND: ras: aest: Restore misc0 register on CPU idle exit #672, ras: aest: extend AEST support to Device Tree frontend #603)

No lore links expected or required

Revert rationale is clearly documented in commit messages

Verdict

Merge with awareness of upstream status

All FROMLIST commits correctly preserve authorship and commit message content from their upstream lore sources. The two revert commits appropriately document the rationale for backing out previous vendor changes.

Key considerations:

✅ Authorship is correctly preserved for all FROMLIST commits

✅ Commit messages faithfully represent upstream content

⚠️ Upstream patches are still under review (posted June 2 and September 18, 2026) - not yet merged to mainline

⚠️ Integration presence check shows 2/24 commits missing from qcom-next/topics (see Final Summary ci: Add kernel checkers #4)

Final Summary

Lore link present: Yes - two lore series linked:

Commits 4-19: https://lore.kernel.org/all/20260602071540.3711528-1-tianruidong@linux.alibaba.com/ (Ruidong Tian, v7, posted June 2, 2026)

Commits 20-24: https://lore.kernel.org/all/20260918095746.3347893-1-umang.chheda@oss.qualcomm.com/ (Umang Chheda, v3, posted September 18, 2026)

Commits 1-3: Revert commits - no lore link expected

Lore link matches PR commits: Yes - commit messages, authorship, and technical content are faithful to lore sources. FROMLIST prefix correctly indicates patches posted to mailing list but not yet merged.

Upstream patch status: ⏳ Decision Pending - Both patch series were posted to linux-edac@vger.kernel.org in 2026 (June 2 and September 18). No merge signals (applied/queued/Reviewed-by/Acked-by) or rejection signals (NAK) found in the fetched lore threads. The patches are under active community review. Last activity: September 18, 2026 (v3 of DT frontend series).

PR present in qcom-next/topics: Fail - Per integration_presence_report.md: 22/24 commits are present in topics branch, but 2/24 commits are missing from both qcom-next and topics:

Commit 1/24: Revert "Move CPU PM notifier registration to Probe (WORKAROUND: Move CPU PM notifier registration to Probe #711)" - missing

Commit 2/24: Revert "ras: aest: Restore misc0 register on CPU idle (WORKAROUND: ras: aest: Restore misc0 register on CPU idle exit #672)" - missing

The two missing commits are vendor-specific reverts that back out previous WORKAROUND changes. Their absence from qcom-next/topics may indicate they are new cleanup work specific to this PR.

Deterministic Integration Presence

Integration Presence Report

This report is generated by Jarvis before validate-patch runs.
It is the authoritative source for whether PR changes are already present
in qcom-next or in the kernel topic branches.

Kernel repo: /local/mnt/workspace/sgaud/Qgenie/image_pipeline/kernel
qcom-next ref: 1a0586064ee1fbcefe49b6382ee17a236c590879
topics remote: topics -> https://github.com/qualcomm-linux/kernel-topics
topics fetch: fetched

Commit Subject qcom-next topics Final

1/24 [PATCH 01/24] Revert "Move CPU PM notifier registration to Probe missing - no subject, patch-id, or full tree-content match found missing - no subject, patch-id, or full tree-content match found missing

2/24 [PATCH 02/24] Revert "ras: aest: Restore misc0 register on CPU idle missing - no subject, patch-id, or full tree-content match found missing - no subject, patch-id, or full tree-content match found missing

3/24 [PATCH 03/24] Revert "ras: aest: extend AEST support to Device Tree partial - subject or partial tree evidence found, but full change was not verified present - all checked added lines are present present

4/24 [PATCH 04/24] FROMLIST: ACPI/AEST: Register arm64_ras platform partial - subject or partial tree evidence found, but full change was not verified present - all checked added lines are present present

5/24 [PATCH 05/24] FROMLIST: arm64: ras: Add probe/remove for arm64_ras partial - subject or partial tree evidence found, but full change was not verified present - all checked added lines are present present

6/24 [PATCH 06/24] FROMLIST: arm64: ras: Unify the read/write interface missing - no subject, patch-id, or full tree-content match found present - exact patch-id match at 2ddca94 present

7/24 [PATCH 07/24] FROMLIST: arm64: ras: Support RAS Common Fault missing - no subject, patch-id, or full tree-content match found present - exact patch-id match at 58d3309 present

8/24 [PATCH 08/24] FROMLIST: arm64: ras: Plumb AEST interrupts as platform partial - subject or partial tree evidence found, but full change was not verified present - exact patch-id match at 1414249 present

9/24 [PATCH 09/24] FROMLIST: arm64: ras: Enable error reporting partial - subject or partial tree evidence found, but full change was not verified present - all checked added lines are present present

10/24 [PATCH 10/24] FROMLIST: arm64: ras: Add error record processing and partial - subject or partial tree evidence found, but full change was not verified present - exact patch-id match at 7c5f989 present

11/24 [PATCH 11/24] FROMLIST: arm64: ras: Handle memory failure for partial - subject or partial tree evidence found, but full change was not verified present - exact patch-id match at f7354a6 present

12/24 [PATCH 12/24] FROMLIST: arm64: ras: Probe RAS architecture version partial - subject or partial tree evidence found, but full change was not verified present - exact patch-id match at f434edf present

13/24 [PATCH 13/24] FROMLIST: arm64: ras: Support CE threshold of error partial - subject or partial tree evidence found, but full change was not verified present - exact patch-id match at 51ae79b present

14/24 [PATCH 14/24] FROMLIST: arm64: ras: Add RAS decode notifier chain partial - subject or partial tree evidence found, but full change was not verified present - exact patch-id match at f9c5b4e present

15/24 [PATCH 15/24] FROMLIST: arm64: ras: Expose config abi through debugfs partial - subject or partial tree evidence found, but full change was not verified present - exact patch-id match at ce37f55 present

16/24 [PATCH 16/24] FROMLIST: arm64: ras: Introduce ras inject interface missing - no subject, patch-id, or full tree-content match found present - exact patch-id match at 686c395 present

17/24 [PATCH 17/24] FROMLIST: arm64: ras: support vendor node CMN700 partial - subject or partial tree evidence found, but full change was not verified present - exact patch-id match at 5630db4 present

18/24 [PATCH 18/24] FROMLIST: arm64: ras: Introduce ras error storm missing - no subject, patch-id, or full tree-content match found present - exact patch-id match at e1276b0 present

19/24 [PATCH 19/24] FROMLIST: trace, ras: add ARM RAS extension trace event partial - subject or partial tree evidence found, but full change was not verified present - all checked added lines are present present

20/24 [PATCH 20/24] FROMLIST: dt-bindings: arm: ras: Introduce ARM RAS missing - no subject, patch-id, or full tree-content match found present - exact patch-id match at b0d8417 present

21/24 [PATCH 21/24] FROMLIST: arm64: ras: Add Device Tree frontend missing - no subject, patch-id, or full tree-content match found present - exact patch-id match at dbf8f4d present

22/24 [PATCH 22/24] FROMLIST: arm64: dts: qcom: monaco: add RAS error partial - subject or partial tree evidence found, but full change was not verified present - exact patch-id match at e5c50e7 present

23/24 [PATCH 23/24] FROMLIST: arm64: dts: qcom: lemans: add RAS error partial - subject or partial tree evidence found, but full change was not verified present - exact patch-id match at 044fb5f present

24/24 [PATCH 24/24] FROMLIST: arm64: dts: qcom: shikra: add RAS error missing - no subject, patch-id, or full tree-content match found present - all checked added lines are present present

Final Status

overall_status: FAIL
present_commits: 22/24
partial_commits: 0/24
missing_commits: 2/24
topics_checked_for_commits: 24/24
final_summary: PR present in qcom-next/topics: Fail - 2/24 commit(s) are missing from both qcom-next and topics

qlijarvis · 2026-10-22T07:06:12Z

PR #1324 — checker-log-analyzer

PR: #1324
Checker run: https://github.com/qualcomm-linux/kernel-config/actions/runs/39729390395

Checker	Result	Summary
Checker	Result	Summary
checkpatch	❌	3 commits with missing Signed-off-by, 1 commit with spacing errors, 3 commits with Co-developed-by format issues
dt-binding-check	❌	YAML syntax error: redundantly quoted string at line 164
dtb-check	✅	Passed
sparse-check	✅	Passed
check-uapi-headers	✅	Passed
check-patch-compliance	❌	3 commits missing required prefix, 15 commits with b4 fetch failures
tag-check	⚠️	Cannot verify (GitHub API unavailable) - manual check required

Detailed report: Full report

Checker analysis — click to expand

🤖 CI Checker Analysis (checker-log-analyzer)

PR: #1324 - ARM RAS (Reliability, Availability, Serviceability) framework rewrite
Source: https://github.com/qualcomm-linux/kernel-config/actions/runs/39729390395

Checker Result Summary

checkpatch ❌ 3 commits with missing Signed-off-by, 1 commit with spacing errors, 3 commits with Co-developed-by format issues

dt-binding-check ❌ YAML syntax error: redundantly quoted string at line 164

dtb-check ✅ Passed

sparse-check ✅ Passed

check-uapi-headers ✅ Passed

check-patch-compliance ❌ 3 commits missing required prefix, 15 commits with b4 fetch failures

tag-check ⚠️ Cannot verify (GitHub API unavailable) - manual check required

❌ checkpatch

Root cause: Multiple commits have missing Signed-off-by: trailers and formatting issues.

Failure details:

Commit f61cda4 - Revert "Move CPU PM notifier registration to Probe (#711)""
ERROR: Missing Signed-off-by: line(s)
WARNING: Non-standard signature: Co-Authored-By:
WARNING: 'Co-authored-by:' is the preferred signature form
Commit 111e78c - Revert "ras: aest: Restore misc0 register on CPU idle exit (#672)""
ERROR: Missing Signed-off-by: line(s)
WARNING: Non-standard signature: Co-Authored-By:
WARNING: 'Co-authored-by:' is the preferred signature form
Commit 17fe4fc - Revert "ras: aest: extend AEST support to Device Tree frontend (#603)""
ERROR: Missing Signed-off-by: line(s)
WARNING: Non-standard signature: Co-Authored-By:
WARNING: 'Co-authored-by:' is the preferred signature form
WARNING: DT binding docs and includes should be a separate patch (×4)
Commit 102c824 - FROMLIST: arm64: ras: Add probe/remove for arm64_ras driver
ERROR: spaces required around that ':' (ctx:VxE)
#152: FILE: drivers/ras/arm64/ras.h:150:
+	default:
 	       ^

ERROR: spaces required around that ':' (ctx:VxE)
#169: FILE: drivers/ras/arm64/ras.h:167:
+	default:
 	       ^
Commits 41c9b93, 3b11dbc, 8f9554f - DTS commits:
WARNING: Co-developed-by: must be immediately followed by Signed-off-by:
Fix:
Add missing Signed-off-by: trailers to commits f61cda4, 111e78c, 17fe4fc:
git rebase -i <base_sha>   # mark each commit as 'edit'
git commit --amend -s      # adds Signed-off-by
git rebase --continue
Change Co-Authored-By: to Co-authored-by: (lowercase 'a') in the three revert commits.

Fix spacing errors in commit 102c824 at drivers/ras/arm64/ras.h:150 and :167:

The default: label in a switch statement is being flagged incorrectly by checkpatch.

This is a false positive — default: labels don't require spaces around the colon.

No fix needed; this is a known checkpatch limitation with switch labels.
Fix Co-developed-by: trailer order in commits 41c9b93, 3b11dbc, 8f9554f:
Each Co-developed-by: must be immediately followed by a Signed-off-by: from that co-author.
Correct format:
Co-developed-by: Name <email>
Signed-off-by: Name <email>
Signed-off-by: Primary Author <email>
Reproduce locally:
./scripts/checkpatch.pl --strict --ignore FILE_PATH_CHANGES --git <base>..<head>
❌ dt-binding-check

Root cause: YAML linting error in Documentation/devicetree/bindings/arm/arm,ras.yaml at line 164 — string value is redundantly quoted.

Failure details:
../Documentation/devicetree/bindings/arm/arm,ras.yaml:164:9: [error] string value is redundantly quoted with any quotes (quoted-strings)
Fix:

Open Documentation/devicetree/bindings/arm/arm,ras.yaml and locate line 164. Remove the redundant quotes around the string value. For example:

Before:
description: "Some description text"
After:
description: Some description text
Or if it's a single-word value:
type: "string"  →  type: string
Reproduce locally:
make -j$(nproc) O=out defconfig
make -j$(nproc) O=out dt_binding_check DT_SCHEMA_FILES=Documentation/devicetree/bindings/arm/arm,ras.yaml
❌ check-patch-compliance

Root cause: Two types of failures: (1) Revert commits missing required prefix, (2) b4 fetch failures for all FROMLIST commits due to invalid or inaccessible lore.kernel.org links.

Failure details:

Missing prefix (3 commits):
Checking commit: Revert "Move CPU PM notifier registration to Probe (#711)"
Commit summary does not start with a required prefix

Checking commit: Revert "ras: aest: Restore misc0 register on CPU idle exit (#672)"
Commit summary does not start with a required prefix

Checking commit: Revert "ras: aest: extend AEST support to Device Tree frontend (#603)"
Commit summary does not start with a required prefix
b4 fetch failures (15 commits):
All FROMLIST commits (patches 04-24) reference the same lore link:
Something seems wrong with the provided link. Please verify it
Try below command to run locally-
b4 am --single-message -C -l -3 https://lore.kernel.org/all/20260602071540.3711528-1-tianruidong@linux.alibaba.com/
Fix:
Revert commits need a prefix:
Add UPSTREAM:, FROMLIST:, or BACKPORT: before Revert:
UPSTREAM: Revert "Move CPU PM notifier registration to Probe (#711)"
If these are reverting vendor-only commits, use QCLINUX: (but note: check-patch-compliance will still fail for QCLINUX: — this is a known checker limitation).
b4 fetch failures:
The lore link https://lore.kernel.org/all/20260602071540.3711528-1-tianruidong@linux.alibaba.com/ is dated June 2, 2026 (future date from the checker's perspective on Oct 22, 2026).

Verify the link is correct — the date format suggests this may be a typo or the series hasn't been posted yet.
If the series is genuinely posted, test the link manually:
b4 am --single-message -C -l -3 https://lore.kernel.org/all/20260602071540.3711528-1-tianruidong@linux.alibaba.com/
If b4 fails, the link may be:

Incorrect message-ID — verify the correct lore URL from the mailing list.

Not yet posted — if the series is still pending, the checker will always fail.

Network/transient issue — re-trigger CI.
Reproduce locally:
# Test the lore link
b4 am --single-message -C -l -3 https://lore.kernel.org/all/20260602071540.3711528-1-tianruidong@linux.alibaba.com/

# Run the full checker
cd kernel-checkers
./check-patch-compliance.sh --kernel-src /path/to/kernel --base <base_sha> --head <head_sha>
⚠️ tag-check

Status: Cannot verify automatically (GitHub API unavailable).

Manual check required:

If the PR target branch is not qcom-next or qcom-next-staging, every commit subject must start with one of:

FROMLIST: / FROMGIT: / UPSTREAM: / BACKPORT: / QCLINUX: / PENDING: / WORKAROUND:

Current status:

✅ Commits 04-24 have FROMLIST: prefix

❌ Commits 01-03 (Revert commits) have no prefix

Action:
Confirm the target branch via the PR page.
If target is not qcom-next or qcom-next-staging, add a prefix to commits 01-03:
UPSTREAM: Revert "Move CPU PM notifier registration to Probe (#711)"
UPSTREAM: Revert "ras: aest: Restore misc0 register on CPU idle exit (#672)"
UPSTREAM: Revert "ras: aest: extend AEST support to Device Tree frontend (#603)"
Verdict

3 blockers must be fixed before merge:

checkpatch: Add Signed-off-by: to 3 revert commits, fix Co-authored-by: capitalization, fix Co-developed-by: trailer order in 3 DTS commits.

dt-binding-check: Remove redundant quotes at line 164 in arm,ras.yaml.

check-patch-compliance: Add prefix to 3 revert commits; verify/fix lore.kernel.org link for all FROMLIST commits.

Non-blockers:

checkpatch spacing error on default: labels is a false positive (no fix needed).

DT binding split warning on revert commit is informational (revert is removing the binding, not adding it).

Recommendation: Fix the 3 blockers above, then re-trigger CI. The b4 fetch failures suggest the lore link may need correction — verify the series was actually posted to the mailing list with the correct message-ID.

Faruque Ansari and others added 24 commits October 21, 2026 17:50

Faruque Ansari (faruque-ansari) requested review from a team, Amit Kucheria (idlethread), knaveen-qc and Mukesh Ojha (mukeshojha-linux) October 22, 2026 05:38

Faruque Ansari (faruque-ansari) changed the title ~~Revert aest pr 603 672 711~~ ras: add ARM RAS extensions and Device Tree frontend Oct 22, 2026

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qlijarvis commented Oct 22, 2026

PR #1324 — validate-patch

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qlijarvis commented Oct 22, 2026

PR #1324 — checker-log-analyzer

🤖 CI Checker Analysis (checker-log-analyzer)

❌ checkpatch

❌ dt-binding-check

❌ check-patch-compliance

⚠️ tag-check

Verdict

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Faruque Ansari (faruque-ansari) commented Oct 22, 2026 •

edited

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