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Optimization of various matrix operations for different hardware- 1) Hierarchical memory (registers, cache, virtual memory), 2) Instruction level parallelism, 3) Multicore processors, 4) Shared memory parallelism, 5) GPU (CUDA), 6) Distributed memory parallelism (MPI). Code developed as a part of amath 583 course at University of Washington.
Optimization of various matrix operations for different hardware- 1) Hierarchical memory (registers, cache, virtual memory), 2) Instruction level parallelism, 3) Multicore processors, 4) Shared memory parallelism, 5) GPU (CUDA), 6) Distributed memory parallelism (MPI). Code developed as a part of amath 583 course at University of Washington.
