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[aarch64] Fix a couple of lifting errors - #8609

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test_aarch64_lifting_fixes
Oct 9, 2026
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test_aarch64_lifting_fixes

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@bdash bdash commented Oct 1, 2026

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  • SMAX, SMIN, UMAX, UMIN and ABS were unintentionally skipping the fallback to intrinsics for their vector forms.
  • The 32-bit atomic store aliases (STADD, STCLR, STEOR, and STSET) were using the size of the wrong operand for the store's size.
  • SWP loaded into Rt before storing Rs, so it stored the loaded value when the two were the same register.

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bdash added this pull request to stack #8610 October 1, 2026 17:11
Base automatically changed from test_exarmo to dev October 6, 2026 04:33
@bdash
bdash force-pushed the test_aarch64_lifting_fixes branch from 5839934 to 3908f7e Compare October 6, 2026 04:33
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zznop self-requested a review October 8, 2026 16:57

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Approving this. Just a couple of small recommended changes.

Comment thread arch/arm64/arm64test.py
Comment thread arch/arm64/arm64test.py
bdash added 2 commits October 8, 2026 18:57
`STADD`, `STCLR`, `STEOR` and `STSET` took their store size from the
address register, so the 32-bit forms stored 8 bytes. `SWP` loaded into
Rt before storing Rs, so it stored the loaded value when the two were
the same register. It now loads into a temporary first, as the other
atomics do.
The `SMAX`, `SMIN`, `UMAX`, `UMIN` and `ABS` cases lift the FEAT_CSSC
scalar forms directly and lifted every other encoding as unimplemented,
which skipped the ACLE intrinsic fallback. The Neon forms now lift to
their intrinsics, such as `vminq_u32`, as other vector instructions do.
@bdash
bdash force-pushed the test_aarch64_lifting_fixes branch from 3908f7e to 75a2635 Compare October 9, 2026 01:59
@bdash
bdash merged commit 75a2635 into dev Oct 9, 2026
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@bdash
bdash deleted the test_aarch64_lifting_fixes branch October 9, 2026 01:59
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2 participants