[libcpu][riscv] fix MMU and user fault handling for Smart by BernardXiong · Pull Request #11892 · RT-Thread/rt-thread

BernardXiong · 2026-10-18T11:35:56Z

拉取/合并请求描述：(PR description)

为什么提交这份PR (why to submit this PR)

Several RISC-V Smart issues prevented reliable user space operation: early page table pointers were not translated with the kernel physical offset, per-hart page tables inherited user mappings, early page tables were not flushed, and unhandled user faults could terminate the kernel instead of the current process.

你的解决方案是什么 (what is your solution)

add XuanTie architecture selection and the SVPBMT option
translate early page table pointers with the kernel physical offset
allow the MPR range to extend below the linked kernel base
clean early page tables before enabling the MMU
clear user address entries in per-hart kernel page tables
terminate only the current LWP on unhandled user faults
keep interrupts enabled while reporting user context

请提供验证的bsp和config (provide the config and bsp)

BSP: bsp/qemu-virt64-riscv, bsp/k230
.config: CONFIG_RT_USING_SMART=y, CONFIG_ARCH_RISCV64=y
action: local build not run; the RISC-V musleabi toolchain is not available in this environment, CI will verify the build

当前拉取/合并请求的状态 Intent for your PR

必须选择一项 Choose one (Mandatory):

本拉取/合并请求是一个草稿版本 This PR is for a code-review and is intended to get feedback
本拉取/合并请求是一个成熟版本 This PR is mature, and ready to be integrated into the repo

代码质量 Code Quality：

我在这个拉取/合并请求中已经考虑了 As part of this pull request, I've considered the following:

已经仔细查看过代码改动的对比 Already check the difference between PR and old code
代码风格正确，包括缩进空格，命名及其他风格 Style guide is adhered to, including spacing, naming and other styles
没有垃圾代码，代码尽量精简，不包含#if 0代码，不包含已经被注释了的代码 All redundant code is removed and cleaned up
所有变更均有原因及合理的，并且不会影响到其他软件组件代码或BSP All modifications are justified and not affect other components or BSP
对难懂代码均提供对应的注释 I've commented appropriately where code is tricky
代码是高质量的 Code in this PR is of high quality
已经使用clang-format 源码格式化工具确保格式符合RT-Thread代码规范 This PR has been formatted with clang-format and complies with RT-Thread code specification
如果是新增bsp, 已经添加ci检查到.github/ALL_BSP_COMPILE.json 详细请参考链接BSP自查

- add XuanTie architecture selection and the SVPBMT option - translate early page table pointers with the kernel physical offset - allow the MPR range to extend below the linked kernel base - clean early page tables and clear user entries for each hart - terminate only the current LWP on unhandled user faults - keep interrupts enabled while reporting user context

github-actions · 2026-10-18T11:59:22Z

👋 感谢您对 RT-Thread 的贡献！Thank you for your contribution to RT-Thread!

为确保代码符合 RT-Thread 的编码规范，请在你的仓库中执行以下步骤运行代码格式化工作流（如果格式化CI运行失败）。
To ensure your code complies with RT-Thread's coding style, please run the code formatting workflow by following the steps below (If the formatting of CI fails to run).

🛠 操作步骤 | Steps

前往 Actions 页面 | Go to the Actions page
点击进入工作流 → | Click to open workflow →
点击 Run workflow | Click Run workflow

Use workflow from 保持默认分支（通常为 master）
Keep the default branch (usually master) in Use workflow from
在 branch 输入框填写 PR 分支 pr/riscv-smart-mmu
Enter PR branch pr/riscv-smart-mmu in the branch field
设置需排除的文件/目录（目录请以"/"结尾）
Set files/directories to exclude (directories should end with "/")

等待工作流完成 | Wait for the workflow to complete
格式化后的代码将作为独立提交推送至你的分支。
The formatting changes will be pushed to your branch as a separate commit.

完成后，提交将自动更新至 pr/riscv-smart-mmu 分支，关联的 Pull Request 也会同步更新。
Once completed, commits will be pushed to the pr/riscv-smart-mmu branch automatically, and the related Pull Request will be updated.

如有问题欢迎联系我们，再次感谢您的贡献！💐
If you have any questions, feel free to reach out. Thanks again for your contribution!

github-actions · 2026-10-18T12:17:38Z

📌 Code Review Assignment

🏷️ Tag: libcpu_riscv

Reviewers: @Yaochenger

Changed Files (Click to expand)

libcpu/risc-v/common/mmu.c
libcpu/risc-v/common/trap.c
libcpu/risc-v/common64/mmu.c

📊 Current Review Status (Last Updated: 2026-10-23 23:09 CST)

⌛ @Yaochenger Pending Review

📝 Review Instructions

维护者可以通过单击此处来刷新审查状态: 🔄 刷新状态
Maintainers can refresh the review status by clicking here: 🔄 Refresh Status
确认审核通过后评论 LGTM/lgtm
Comment LGTM/lgtm after confirming approval
PR合并前需至少一位维护者确认
PR must be confirmed by at least one maintainer before merging

ℹ️ 刷新CI状态操作需要具备仓库写入权限。
ℹ️ Refresh CI status operation requires repository Write permission.

- add a forward declaration for the user fault register dump - fix the implicit declaration error on RISC-V builds

cms19859230182-lang · 2026-10-18T14:36:46Z

+        int start_idx = USER_VADDR_START >> VPN2_SHIFT;
+        int end_idx = USER_VADDR_TOP >> VPN2_SHIFT;
+        for (i = start_idx; i <= end_idx; i++)
+        {
+            mmu_table[i] = 0;


熊老师好呀！这段清零好像只在非 SMP 分支，SMP 下每个 hart 的 table 是不是也要清一下？另外 common 用的是 USER_VADDR_TOP - 1，这里是 TOP，不知道是不是有意的？如有误解请指正，谢谢！

感谢指出，确实有问题，已修复（commit bcde514）：

将清零逻辑抽成 _clear_user_pgtbl_entries()；SMP 分支现在会对每个 hart 的 L1 表（RT_CPUS_NR 个页）都执行清零，不再只处理非 SMP 路径。

末尾索引改为 (USER_VADDR_TOP - 1) >> VPN2_SHIFT，与 common 实现保持一致，按半开区间 [USER_VADDR_START, USER_VADDR_TOP) 处理。在当前开启 ARCH_REMAP_KERNEL 的配置下两者得到的索引相同，但语义上应排除 TOP。

cms19859230182-lang · 2026-10-18T14:44:38Z

        sys_exit_group(-1);
+        csr_write(CSR_STATUS, saved_stat);


熊老师好呀！sys_exit_group(-1) 后面的 csr_write 按理走不到，IE 会一直开着。是不是先恢复再调更稳？如有误解请指正，谢谢！

这里是有意把恢复放在 sys_exit_group() 之后的（commit bcde514 仅补充注释说明）：

正常路径下 sys_exit_group() → lwp_exit() 不会返回，csr_write() 不会执行；此时保持 IE 开启是必要的：lwp_exit() 内部的 LWP_LOCK() 会调用 RT_DEBUG_SCHEDULER_AVAILABLE(1)，在 UP + RT_DEBUGING_CONTEXT 下如果中断关闭会直接断言；另外进程 teardown 也可能获取 sleeping lock。

只有 lwp_self() 为空、sys_exit_group() 返回 -EINVAL 时，csr_write() 才会执行并恢复进入前的 sstatus。

因此没有把恢复提前，仅在 csr_write() 前加了一条注释说明该分支。

搜噶搜噶

github-actions · 2026-10-18T15:59:46Z

MemBrowse Memory Report · Explore what changed →

k230

SRAM: .eh_frame +16 B (+0.0%, 1,128,555 B / 268,300,288 B, total: 0% used)

No memory changes detected for:

_{Catch memory regressions in CI with MemBrowse. Free for open source.}

The user address range was only cleared in the non-SMP branch, so SMP builds still inherited the early identity mappings in each hart's user page table. Clear the range in every per-hart table as well. Use USER_VADDR_TOP - 1 when computing the last top-level index to keep the half-open [USER_VADDR_START, USER_VADDR_TOP) semantics, matching the common RV32 implementation. Also document that the sstatus restore after sys_exit_group() only runs when there is no LWP to terminate. It must not be moved before the call: process teardown takes sleeping locks and therefore needs interrupts enabled. Co-authored-by: DeepSeek 4.1 Flash <noreply@deepseek.com>

BernardXiong · 2026-10-24T03:18:07Z

当前 3 个失败检查（ESP32C3、ESP32C6、analyze (esp32-c3, ...)）均为 master 上 ESP32-C3/C6 的既有构建问题，与本 PR 的 libcpu/risc-v 改动无关：

ESP-IDF 的 scons shim 使用 #include_next 转发 <freertos/FreeRTOS.h>，包加载顺序不稳定时会解析到 ESP-IDF 自带的 FreeRTOS-Kernel V11 头，导致 Wrapper 配置默认值缺失；Wi-Fi/BLE attachconfig 下还会选中 ESP-IDF 的 FreeRTOSConfig.h。
已在独立 PR [bsp][esp32] fix FreeRTOS include order for C3/C6 builds #11926 中修复，C3/C6 及 BLE/Wi-Fi 配置均验证通过；该 PR CI 全绿，合并后重新触发本 PR 的 CI 即可通过。

本 PR 自身相关检查（包括 xuantie-smart / common64 SMP 路径）均已通过。

BernardXiong mentioned this pull request Oct 18, 2026

[bsp][k230] add K230D support and Smart improvements #11897

Open

1 of 10 tasks

BernardXiong marked this pull request as ready for review October 18, 2026 12:07

github-actions Bot added Arch: RISC-V BSP related with risc-v libcpu labels Oct 18, 2026

[libcpu][riscv] declare rt_hw_show_register before use

88463e2

- add a forward declaration for the user fault register dump - fix the implicit declaration error on RISC-V builds

cms19859230182-lang reviewed Oct 18, 2026

View reviewed changes

Navigation Menu

Repository navigation

[libcpu][riscv] fix MMU and user fault handling for Smart - #11892

[libcpu][riscv] fix MMU and user fault handling for Smart#11892
BernardXiong wants to merge 3 commits into
RT-Thread:masterfrom
BernardXiong:pr/riscv-smart-mmu

BernardXiong commented Oct 18, 2026 •

edited

Loading

Uh oh!

github-actions Bot commented Oct 18, 2026

Uh oh!

github-actions Bot commented Oct 18, 2026 •

edited

Loading

Uh oh!

cms19859230182-lang Oct 18, 2026

Uh oh!

BernardXiong Oct 23, 2026

Uh oh!

cms19859230182-lang Oct 18, 2026

Uh oh!

BernardXiong Oct 23, 2026

Uh oh!

cms19859230182-lang Oct 24, 2026

Uh oh!

github-actions Bot commented Oct 18, 2026 •

edited

Loading

Uh oh!

BernardXiong commented Oct 24, 2026

Uh oh!

This branch has not been deployed

Reviewers

Uh oh!

Assignees

Labels

Projects

Milestone

Development

Uh oh!

2 participants

Conversation

BernardXiong commented Oct 18, 2026 • edited Loading Uh oh! There was an error while loading. Please reload this page.

Uh oh!

拉取/合并请求描述：(PR description)

为什么提交这份PR (why to submit this PR)

你的解决方案是什么 (what is your solution)

请提供验证的bsp和config (provide the config and bsp)

当前拉取/合并请求的状态 Intent for your PR

代码质量 Code Quality：

Uh oh!

github-actions Bot commented Oct 18, 2026

🛠 操作步骤 | Steps

Uh oh!

github-actions Bot commented Oct 18, 2026 • edited Loading Uh oh! There was an error while loading. Please reload this page.

Uh oh!

📌 Code Review Assignment

🏷️ Tag: libcpu_riscv

📊 Current Review Status (Last Updated: 2026-10-23 23:09 CST)

📝 Review Instructions

Uh oh!

cms19859230182-lang Oct 18, 2026

Choose a reason for hiding this comment

Uh oh!

BernardXiong Oct 23, 2026

Choose a reason for hiding this comment

Uh oh!

cms19859230182-lang Oct 18, 2026

Choose a reason for hiding this comment

Uh oh!

BernardXiong Oct 23, 2026

Choose a reason for hiding this comment

Uh oh!

cms19859230182-lang Oct 24, 2026

Choose a reason for hiding this comment

Uh oh!

github-actions Bot commented Oct 18, 2026 • edited Loading Uh oh! There was an error while loading. Please reload this page.

Uh oh!

MemBrowse Memory Report · Explore what changed →

k230

Uh oh!

BernardXiong commented Oct 24, 2026

Uh oh!

This branch has not been deployed

Reviewers

Uh oh!

Assignees

Labels

Projects

Milestone

Development

Uh oh!

2 participants

BernardXiong commented Oct 18, 2026 •

edited

Loading

github-actions Bot commented Oct 18, 2026 •

edited

Loading

github-actions Bot commented Oct 18, 2026 •

edited

Loading